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EM6607 Scheda tecnica(PDF) 8 Page - EM Microelectronic - MARIN SA

Il numero della parte EM6607
Spiegazioni elettronici  Ultra-low power microcontroller with 4 high drive outputs
PDF  47 Pages
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Produttore elettronici  EMMICRO [EM Microelectronic - MARIN SA]
Homepage  http://www.emmicroelectronic.com
Logo EMMICRO - EM Microelectronic - MARIN SA

EM6607 Scheda tecnica(HTML) 8 Page - EM Microelectronic - MARIN SA

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EM6607
Copyright © 2005, EM Microelectronic-Marin SA
8
www.emmicroelectronic.com
Table 2.
Watchdog register - WD
Bit
Name
Reset
R/W
Description
3
WDRST
-
R/W
Watchdog timer reset
2
Slmask
-
R/W
SLEEP mask bit
1
WD1
0
R
WD Timer data 1/4 Hz
0
WD0
0
R
WD Timer data 1/2 Hz
131H
Table 3 shows the status of different EM6607 blocks in these three main operating modes.
Table 3.
Internal state in Active, Stand-by and Sleep mode
Peripheral
/// EM6607 mode
ACTIVE
mode
STAND-BY
mode
SLEEP
mode
POR (static)
On
On
On
Voltage regulator
On
On
On (Low-Power)
Quartz 32768 Hz oscillator
On
On
Off
Clocks (Prescaler & RC divider)
On
On
Off
CPU
Running
In HALT – Stopped
Stopped
Peripheral register
“On”
“On” retain value
retain value
RAM
“On”
retain value
retain value
Timer/Counter
“On”
“On” if activated before
stopped
Supply Voltage Level Det.=SVLD
can be activated
can not be activated
Off
PortA /C, Reset pad debounced
Yes
Yes
No
Interrupts / events
Yes - possible
Yes - possible
No – not possible
Watch-Dog timer
On / Off (soft selectable)
On / Off (soft selectable)
No
Analogue Watchdog (osc.detect)
On/Off (soft select.)
“On” if activated before
Off
3
Power Supply
The EM6607 is supplied by a single external power supply between VDD and VSS, the circuit reference being at VSS (ground). A
built-in voltage regulator generates VREG providing regulated voltage for the oscillator and internal logic. Output drivers are
supplied directly from the external supply VDD. A typical connection configuration is shown in figure 4.
For VDD less then 1.4V it is recommended that VDD is connected directly to VREG connected
For VDD >1.8V then the configuration shown in
132H
Figure 4 should be used.
*registers are marked in bold and underlined like
IntRq
*Bits/Flags in registers are marked in bold only like
SLEEP



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