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M24512-DF Scheda tecnica(PDF) 21 Page - STMicroelectronics

Il numero della parte M24512-DF
Spiegazioni elettronici  512-Kbit serial I²C bus EEPROM
PDF  47 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24512-DF Scheda tecnica(HTML) 21 Page - STMicroelectronics

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Figure 11. AC measurement I/O waveform
0.8VCC
0.2VCC
0.7VCC
0.3V CC
Input and output
Timing reference levels
Input voltage levels
Table 11. Input parameters
Symbol
Parameter(1)
Test condition
Min.
Max.
Unit
CIN
Input capacitance (SDA)
-
-
8
pF
CIN
Input capacitance (other pins)
-
-
6
pF
ZL
Input impedance (E2, E1, E0, WC)(2)
VIN < 0.3 VCC
30
-
ZH
VIN > 0.7 VCC
500
-
1. Characterized only, not tested in production.
2. E2, E1, E0 input impedance when the memory is selected (after a start condition).
Table 12. Cycling performance by groups of four bytes
Symbol
Parameter
Test condition
Max.
Unit
Ncycle
Write cycle endurance(1)
TA ≤ 25 °C, VCC(min) < VCC < VCC(max)
4,000,000
Write cycle(2)
TA = 85 °C, VCC(min) < VCC < VCC(max)
1,200,000
1. The write cycle endurance is defined by characterization and qualification. For devices embedding the ECC functionality ,
the write cycle endurance is defined for group of four bytes located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3] where N is an
integer.
2. A Write cycle is executed when either a page write, a byte write, a write identification page or a lock identification page
instruction is decoded. When using the byte write, the page write or the write identification page, refer also to
Section 5.1.5 ECC (error correction code) and write cycling
Table 13. Memory cell data retention
Parameter
Test condition
Min.
Unit
Data retention(1)
TA = 55 °C
200
Year
1. The data retention behaviour is checked in production, while the data retention limit defined in this table is extracted from
characterization and qualification results.
M24512-W M24512-R M24512-DF
DC and AC parameters
DS6520 - Rev 31
page 21/47



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