Philips Semiconductors

Product specification

74LV393

Dual 4-bit binary ripple counter

1998 Jun 10

7

AC WAVEFORMS

output load.

SV00678

nCP INPUT

GND

Figure 1. Clock (nCP) to output (1Qn, 2Qn) propagation delays,

the clock pulse width, and the maximum clock frequency

SV00679

nMR INPUT

nCP INPUT

GND

GND

Figure 2. Master reset (nMR) pulse width,

the master reset to output (Qn) propagation delays,

and the master reset to clock (nCP) removal time

TEST CIRCUIT

PULSE

GENERATOR

RT

VI

D.U.T.

VO

CL

VCC

Test Circuit for switching times

DEFINITIONS

< 2.7V

TEST

50pF

SV00901

2.7–3.6V

2.7V

Figure 3. Load circuitry for switching times