STM32G0C1NET3 datasheet(74/159 Pages) STMICROELECTRONICS

Il numero della parte	STM32G0C1NET3

Spiegazioni elettronici	Arm® Cortex®-M0 32-bit MCU, up to 512KB Flash, 144KB RAM,6x USART, timers, ADC, DAC, comm. I/Fs, AES, RNG, 1.7-3.6V

PDF	159 Pages

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Electrical characteristics

STM32G0C1xC/xE

74/159

DS13564 Rev 4

Table 29. Typical current consumption in Run and Low-power run modes,

depending on code executed

Symbol

Parameter

Conditions

Typ

Unit

Typ

Unit

General

Code

Fetch

from(1)

25 °C

IDD(Run)

Supply

current in

Run mode

Range 1;

fHCLK = fPLLRCLK =

64 MHz;

(2)

Reduced code(3)

Flash

memory

8.70

136

μA/MHz

Coremark

8.15

127

Dhrystone 2.1

8.00

125

Fibonacci

7.30

114

While(1) loop

5.90

Reduced code(3)

SRAM

8.85

138

Coremark

9.10

142

Dhrystone 2.1

8.95

140

Fibonacci

9.85

154

While(1) loop

8.85

138

Range 2;

fHCLK = fHSI16 =

16 MHz,

PLL disabled,

(2)

Reduced code(3)

Flash

memory

2.45

153

Coremark

1.90

119

Dhrystone 2.1

1.90

119

Fibonacci

1.70

106

While(1) loop

1.35

Reduced code(3)

SRAM

2.10

131

Coremark

2.10

131

Dhrystone 2.1

2.05

128

Fibonacci

2.25

141

While(1) loop

2.05

128

IDD(LPRun)

Supply

current in

Low-power

run mode

fHCLK = fHSI16/8 =

2 MHz;

PLL disabled,

(2)

Reduced code(3)

Flash

memory

485

μA

243

μA/MHz

Coremark

475

238

Dhrystone 2.1

480

240

Fibonacci

500

250

While(1) loop

515

258

Reduced code(3)

SRAM

490

245

Coremark

485

243

Dhrystone 2.1

480

240

Fibonacci

510

255

While(1) loop

480

240

1. Prefetch and cache enabled when fetching from Flash. Code compiled with high optimization for space in SRAM.

2. VDD = 3.3 V, all peripherals disabled, cache enabled, prefetch disabled for execution in Flash and enabled in SRAM

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