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AT45DB641E Scheda tecnica(PDF) 49 Page - Renesas Technology Corp |
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AT45DB641E Scheda tecnica(HTML) 49 Page - Renesas Technology Corp |
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49 / 69 page ![]() 49 AT45DB641E DS-45DB641E-027N–DFLASH–2/2022 18.5 Program and Erase Characteristics Notes: 1. Values are based on device characterization, not 100% tested in production. 2. Not 100% tested (value guaranteed by design and characterization). 19. Input Test Waveforms and Measurement Levels 20. Output Test Load 1.7V to 3.6V 2.3V to 3.6V Symbol Parameter Min Typ Max Min Typ Max Units t EP Page Erase and Programming Time (256/264 bytes) 10 35 8 35 ms t P Page Programming Time 1.5 5 1.5 3 ms tBP Byte Programming Time 8 8 µs t PE Page Erase Time 7 35 7 35 ms t BE Block Erase Time 25 50 25 50 ms tSE Sector Erase Time 2.5 6.5 2.5 6.5 s t CE Chip Erase Time 80 208 80 208 s t SUSP Suspend Time Program 8 12 8 12 µs Erase 20 30 20 30 t RES Resume Time Program 3 5 3 5 µs Erase 3 5 3 5 tOTPP OTP Security Register Program Time 200 500 200 500 µs AC Driving Levels AC Measurement Level 0.1V CC V CC/2 0.9V CC tR, tF < 2ns (10% to 90%) Device Under Test 30pF |
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