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83C554 Scheda tecnica(PDF) 72 Page - NXP Semiconductors

Il numero della parte 83C554
Spiegazioni elettronici  80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
PDF  76 Pages
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

83C554 Scheda tecnica(HTML) 72 Page - NXP Semiconductors

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Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
72
VDD
P0
EA
RST
XTAL1
XTAL2
VSS
VDD
VDD
IDD
(NC)
CLOCK SIGNAL
VDD
P1.6
P1.7
STADC
EW
AVSS
AVref–
SU00219
Figure 59. IDD Test Condition, Idle Mode
All other pins are disconnected2
2. Idle Mode:
a. The following pins must be forced to VDD: Port 0 and EW.
b. The following pins must be forced to VSS: RST, STADC, AVss, AVref–, and EA.
c. Ports 1.6 and 1.7 should be connected to VDD through resistors of sufficiently high value such that the sink current into these pins
cannot exceed the IOL1 spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
VDD–0.5
0.5V
0.7VDD
0.2VDD–0.1
tCHCL
tCLCL
tCLCH
tCLCX
tCHCX
SU00220
Figure 60. Clock Signal Waveform for IDD Tests in Active and Idle Modes
tCLCH = tCHCL = 5 ns
VDD
P0
RST
XTAL1
XTAL2
VSS
VDD
VDD
IDD
(NC)
VDD
P1.6
P1.7
STADC
EA
EW
AVSS
AVref–
SU00221
Figure 61. IDD Test Condition, Power Down Mode
All other pins are disconnected. VDD = 2 V to 5.5 V3
3. Power Down Mode:
a. The following pins must be forced to VDD: Port 0 and EW.
b. The following pins must be forced to VSS: RST, STADC, XTAL1, AVss, AVref–, and EA.
c. Ports 1.6 and 1.7 should be connected to VDD through resistors of sufficiently high value such that the sink current into these pins
cannot exceed the IOL1 spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
d. The following pins must be disconnected: XTAL2 and all pins not specified above.



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