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RA4E2 Scheda tecnica(PDF) 39 Page - Renesas Technology Corp |
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RA4E2 Scheda tecnica(HTML) 39 Page - Renesas Technology Corp |
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39 / 90 page ![]() GPT output PCLKD tGTOSK Output delay Figure 2.23 GPT output delay skew for OPS tACYC2 AGTIO, AGTEE (input) tACYC tACKWL tACKWH AGTIO, AGTO, AGTOA, AGTOB (output) Figure 2.24 AGT input/output timing ADTRG0 tTRGW Figure 2.25 ADC12 trigger input timing 2.3.7 CAC Timing Table 2.23 CAC timing Parameter Symbol Min Typ Max Unit Test conditions CAC CACREF input pulse width tPBcyc ≤ tcac*1 tCACREF 4.5 × tcac + 3 × tPBcyc — — ns — tPBcyc > tcac*1 5 × tcac + 6.5 × tPBcyc — — ns RA4E2 Datasheet 2. Electrical Characteristics R01DS0413EJ0110 Rev.1.10 Feb 28, 2023 Page 39 of 90 |
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