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INA849 Scheda tecnica(PDF) 5 Page - Texas Instruments

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Il numero della parte INA849
Spiegazioni elettronici  PGA855 Low-Noise, Wide-Bandwidth, Fully Differential Output Programmable-Gain Instrumentation Amplifier
PDF  28 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

INA849 Scheda tecnica(HTML) 5 Page - Texas Instruments

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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VS
Supply voltage on VS+, VS– pins; VS = (VS+) – (VS–)
0
40
V
VSOUT
Supply voltage on LVDD, LVSS pins; VSOUT = VLVDD – VLVSS
0
40
V
Voltage on power pins LVDD, LVSS
(VS–) – 0.5
(VS+) + 0.5
V
VIN
Voltage on signal-input pins IN+, IN–
(VS–) – 40
(VS+) + 40
V
DGND, FDA_IN+, FDA_IN– pin voltage
(VS–) – 0.5
(VS+) + 0.5
V
Voltage on gain-select pins A2, A1, A0
VDGND – 0.5
(VS+) + 0.5
V
VO
Signal output pins maximum voltage on OUT+, OUT–
VLVSS – 0.5
VLVDD + 0.5
V
VOCM
Output common-mode voltage
VLVSS – 0.5
VLVDD + 0.5
V
IO
Signal-output pins current
–100
100
mA
ISC
Output short-circuit current((2))
Continuous
TA
Operating temperature
–50
150
°C
(1)
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2)
Short-circuit to VSOUT / 2.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001((1))
±2000
V
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002((2))
±1000
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VS
Input stage supply voltage
Single supply
8
36
V
Dual supply
±4
±18
VSOUT
Output stage supply voltage
Single supply
4.5
36
V
Dual supply
±2.25
±18
TA
Specified temperature
–40
125
°C
7.4 Thermal Information
THERMAL METRIC(1)
PGA855
UNIT
RGT (VQFN)
16 PINS
RθJA
Junction-to-ambient thermal resistance
47.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
53.6
°C/W
RθJB
Junction-to-board thermal resistance
22.0
°C/W
ψJT
Junction-to-top characterization parameter
1.4
°C/W
ψJB
Junction-to-board characterization parameter
22.0
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
7.8
°C/W
(1)
For information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
www.ti.com
PGA855
SBOSAE0 – APRIL 2023
Copyright © 2023 Texas Instruments Incorporated
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