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ZAMC4100 Scheda tecnica(PDF) 99 Page - Renesas Technology Corp |
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ZAMC4100 Scheda tecnica(HTML) 99 Page - Renesas Technology Corp |
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99 / 156 page  ZAMC4100 Datasheet © 2016 Integrated Device Technology, Inc. 99 January 26, 2016 3.14. SBC Registers All SBC registers are organized as one register file that is read/write accessible via the SPI. The SBC register file organization is shown in Figure 3.28. Figure 3.28 SBC Register File Organization SBC Register Block 0x00 0x1B 0x1C 0x1F AUTHSIG Analog trim registers Global system control and status registers Control and status registers for drivers Control and status registers for ADC LIN PHY registers PWM control registers The SBC register address space is 5-bits and is divided into two partitions: application registers and analog trim registers. The application registers are READ/WRITE accessible and contain system and periphery control registers. The analog trim registers are WRITE-protected and can only be authorized by writing the correct code in AUTHSIG (see section 3.14.2). |
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