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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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HC705MC4GRS/D Scheda tecnica(PDF) 132 Page - NXP Semiconductors |
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HC705MC4GRS/D Scheda tecnica(HTML) 132 Page - NXP Semiconductors |
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132 / 180 page  Serial Communications Interface MC68HC705MC4 — Rev. 2.0 Serial Communications Interface RWU — Receiver Wakeup Enable This read/write bit puts the receiver in a standby state. Typically, data transmitted to the receiver clears the RWU bit and returns the receiver to normal operation. The WAKE bit in SCCR1 determines whether an idle input or an address mark brings the receiver out of the standby state. Reset clears the RWU bit. 1 = Standby state 0 = Normal operation SBK — Send Break Setting this read/write bit continuously transmits break codes in the form of 10-bit or 11-bit groups of logic 0s. Clearing the SBK bit stops the break codes and transmits a logic 1 as a start bit. Reset clears the SBK bit. 1 = Break codes being transmitted 0 = No break codes being transmitted Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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