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LP3972 Scheda tecnica(PDF) 42 Page - National Semiconductor (TI) |
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LP3972 Scheda tecnica(HTML) 42 Page - National Semiconductor (TI) |
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42 / 59 page ![]() I 2C Compatible Interface (Continued) V CC_BUCK 2 TARGET VOLTAGE REGISTER (B2TV) 8H’85 Bit 7 6 5 4** 3** 2** 1** 0** Designation Reserved Buck 2 Output Voltage (B2OV) Reset Value 0 0 0 11001 Note: ** denotes one time factory programmable EPROM registers for default values V CC_BUCK 2 TARGET VOLTAGE REGISTER (B2TV) 8H’85 DEFINITIONS Bit Access Name Description 7:5 — Reserved 4:0 R/W B2OV Output Voltage Data Code 5h’01 5h’02 5h’03 5h’04 5h’05 5h’06 5h’07 5h’08 5h’09 5h’0A 5h’0B 5h’0C (V) 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 Data Code 5h’0D 5h’0E 5h’0F 5h’10 5h’11 5h’12 5h’13 5h’14 5h’15 5h’16 5h’17 5h’18 5h’19 (V) 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.80 1.90 2.50 2.80 3.00 3.30 BUCK 3 TARGET VOLTAGE REGISTER (B3TV) 8H’86 Bit 7 6 5 4** 3** 2** 1** 0** Designation Reserved Buck 3 Output Voltage (B3OV) Reset Value 0 0 0 10100 Note: ** denotes one time factory programmable EPROM registers for default values BUCK 3 TARGET VOLTAGE REGISTER (B3TV) 8H’86 DEFINITIONS Bit Access Name Description 7:5 — Reserved 4:0 R/W B3OV Output Voltage Data Code 5h’01 5h’02 5h’03 5h’04 5h’05 5h’06 5h’07 5h’08 5h’09 5h’0A 5h’0B 5h’0C (V) 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 Data Code 5h’0D 5h’0E 5h’0F 5h’11 5h’12 5h’13 5h’14 5h’15 5h’16 5h’17 5h’18 5h’19 (V) 1.40 1.45 1.50 1.60 1.65 1.70 1.80 1.90 2.50 2.80 3.00 3.30 Default www.national.com 42 |
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