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ADL5391ACPZ-R7 Scheda tecnica(PDF) 4 Page - Analog Devices |
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ADL5391ACPZ-R7 Scheda tecnica(HTML) 4 Page - Analog Devices |
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4 / 16 page ![]() ADL5391 Rev. 0 | Page 4 of 16 Parameter Conditions Min Typ Max Unit OIP3 Two-tone IP3 test; X (Y) = 100 mV p-p/tone (−10 dBm into 50 Ω), Y (X) = 1 f1= 49 MHz, f = 50 MHz 26.5 dBm f1 = 999 MHz, f2 = 1 GHz 14 dBm OIP2 f1 = 49 MHz, f = 50 MHz 45.5 dBm f1 = 999 MHz, f2 = 1 GHz 28 dBm Output 1 dB Compression Point X (Y) to W, Y (X) = 1 V, 50 MHz 15.1 dBm 1 GHz 13.2 dBm Group Delay 200 MHz 0.5 ns 1 GHz 0.7 ns Differential Gain Error, X/Y f = 3.58 MHz 2.7 % Differential Phase Error, X/Y f = 3.58 MHz 0.23 Degrees GAIN TRIMMING (α) GADJ Nominal Bias Unconnected 1.12 V Input Range 0 2 V Gain Adjust Range Input 0 V to 2 V 9.5 dB REFERENCE VOLTAGE VMID VPOS/2 V Source Current Common-mode for X, Y, Z = 2.5 V 50 mA POWER AND ENABLE VPOS, COMM, ENBL Supply Voltage Range 4.5 5.5 V Total Supply Current Common-mode for X, Y, Z = 2.5 V 135 mA Disable Current ENBL = 0 V 7.5 mA Disable Threshold High to Low 1.5 V Enable Response Time Delay following high-to-low transition until device meets full specifications 150 ns Disable Response Time Delay following low-to-high transition until device produces full attenuation 50 ns |
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