20

Am29F800T/Am29F800B

8/18/97

PR E L IM IN A R Y

EMBEDDED ALGORITHMS

Note:

1. To insure the command has been accepted, the system software should check the status of DQ3 prior to and following each

subsequent sector erase command. If DQ3 were high on the second status check, the command may not have been ac-

cepted.

Figure 2.

Embedded Erase Algorithm

Start

Erasure Completed

Write Erase Command Sequence

(see below)

Data Polling or Toggle Bit

Successfully Completed

555H/AAH

2AAH/55H

555H/80H

Chip Erase Command Sequence

(Address/Command):

555H/AAH

2AAH/55H

555H/10H

555H/AAH

2AAH/55H

555H/80H

Individual Sector/Multiple Sector

Erase Command Sequence

(Address/Command):

555H/AAH

Sector Address/30H

Sector Address/30H

Sector Address/30H

2AAH/55H

Additional sector

erase commands

are optional

20375C-7