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April 13, 2005

IDT 89TSF500

Figure 8 Output with Pre-Emphasis

89TSF500 AC Test Conditions

Register Field

Value1

1. Differential voltage values are configurable via settings in the SerDes Group Link Configuration Registers. Refer to the

89TSF5xx User Manual for additional information.

Normalized Increase in

Amplitude2

2. Amount “a” in Figure 8.

Deviation in Amplitude from

Nominal (%)

0

0.00

0.0%

10.16

8.0%

2

0.24

12%

3

0.40

20%

4

0.31

15.5%

50.47

23.5%

6

0.54

27%

70.65

32.5%

Table 19 SERDES Tx Typical Pre-Emphasis Levels for Tx Amplitude Setting 3 (1200mV typical)

Input Rise/Fall Time

1 V / ns (20% / 80%)

Output timing measurement reference level (VREF) for 3.3V interfaces.

1.65V

Output load

As shown in Figure 9

Table 20 89TSF500 AC Test Conditions

bit 1bit 2bit 3bit 4bit 5bit 6bit 7bit 8bit 9

• • •

+(1+ a/2)

+(1– a/2)

–(1+ a/2)

–(1– a/2)

+1

–1

Normalized

Voltage

Bit time = 400 ps at 2.5 GHz

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