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ICSSSTUA32864BZRT Scheda tecnica(PDF) 7 Page - Renesas Technology Corp

Il numero della parte ICSSSTUA32864BZRT
Spiegazioni elettronici  25-Bit Configurable Registered Buffer for DDR2
PDF  12 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICSSSTUA32864BZRT Scheda tecnica(HTML) 7 Page - Renesas Technology Corp

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ICSSSTUA32864B
1055A—01/28/05
7
Electrical Characteristics - DC
TA = 0 - 70°C; VDD = 1.8 +/-0.1V (unless otherwise stated)
SYMBOL
PARAMETERS
VDD
MIN
TYP
MAX
UNITS
VIK
II = -18mA
-1.2
VOH
IOH = -6mA
1.7V
1.2
VOL
IOL = 6mA
1.7V
0.5
II
All Inputs
VI = VDD or GND
1.9V
-5
5
µA
Standby (Static)
RESET# = GND
100
µA
Operating (Static)
VI = VIH(AC) or VIL(AC),
RESET# = VDD
40
mA
Dynamic operating
(clock only)
RESET# = VDD,
VI = VIH(AC) or VIL(AC),
CLK and CLK# switching
50% duty cycle.
39
µ/clock
MHz
Dynamic Operating
(per each data input)
1:1 mode
19
Dynamic Operating
(per each data input)
1:2 mode
35
Data Inputs
2.5
3.5
CLK and CLK#
2
3
RESET#
2.5
Notes:
1 - Guaranteed by design, not 100% tested in production.
Ci
VI = VDD or GND
IDDD
RESET# = VDD,
VI = VIH(AC) or VIL (AC),
CLK and CLK# switching
50% duty cycle. One data
input switching at half
clock frequency, 50%
duty cycle
IO = 0
IDD
CONDITIONS
VI = VREF ±350mV
VICR = 1.25V, VI(PP) = 360mV
pF
µA/ clock
MHz/data
V
1.9V
1.8V



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