AN2533 datasheet(3/24 Pages) MOTOROLA

3 / 24 page

AN2533/D

Function Set Configuration

MOTOROLA

Standard SVM – 3 outputs version – XOR version TPU Function Set (svmStd3Xor)

Table 2 shows an example of configuration.

Table 3 shows the TPU function code sizes.

Configuration Order

The CPU configures the TPU as follows.

Disables the channels by clearing the two channel priority bits on each

channel used (not necessary after reset).

Selects the channel functions on all used channels by writing the

function numbers to the channel function select bits.

Table 1. svmStd3Xor TPU function set configuration options and

restrictions

TPU function

Optional/

Mandatory

How many

channels

Assignable channels

svmStd3Xor_R

mandatory

any 3 channels

svmStd3Xor_T

mandatory

any 3 channels

svmStd3Xor_sync

optional

1 or more any channels

svmStd3Xor_res

optional

1 or more any channels

svmStd3Xor_fault

optional

any, recommended is 15 and DTPU bit

set

Table 2. Example of configuration

Channel

TPU function

Priority

svmStd3Xor_R

middle

svmStd3Xor_T

middle

svmStd3Xor_R

middle

svmStd3Xor_T

middle

svmStd3Xor_R

middle

svmStd3Xor_T

middle

svmStd3Xor_sync

low

svmStd3Xor_res

low

svmStd3Xor_fault

high

Table 3. TPU function code sizes.

TPU function

Code size

svmStd3Xor_R

216 µ instructions + 8 entries = 224 long words

svmStd3Xor_T

3 µ instructions + 8 entries = 11 long words

svmStd3Xor_sync

26 µ instructions + 8 entries = 34 long words

svmStd3Xor_res

38 µ instructions + 8 entries = 46 long words

svmStd3Xor_fault

9 µ instructions + 8 entries = 17 long words

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

AN2533 Scheda tecnica(PDF) 3 Page - Motorola, Inc

AN2533 Scheda tecnica(HTML) 3 Page - Motorola, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Scheda tecnica Scarica

Link URL