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ADP1710AUJZ-1.5-R7 Scheda tecnica(PDF) 13 Page - Analog Devices |
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ADP1710AUJZ-1.5-R7 Scheda tecnica(HTML) 13 Page - Analog Devices |
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13 / 16 page ![]() ADP1710/ADP1711 Rev. 0 | Page 13 of 16 OUTLINE DIMENSIONS *COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. PIN 1 1.60 BSC 2.80 BSC 1.90 BSC 0.95 BSC 0.20 0.08 0.60 0.45 0.30 8° 4° 0° 0.50 0.30 0.10 MAX SEATING PLANE *1.00 MAX *0.90 0.87 0.84 2.90 BSC 54 12 3 Figure 30. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions show in millimeters |
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