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BSP255 Scheda tecnica(PDF) 3 Page - NXP Semiconductors

Il numero della parte BSP255
Spiegazioni elettronici  P-channel enhancement mode vertical D-MOS transistor
PDF  10 Pages
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

BSP255 Scheda tecnica(HTML) 3 Page - NXP Semiconductors

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1996 Aug 05
3
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP255
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1. Ts is the temperature at the soldering point of the drain lead.
2. Pulse width and duty cycle limited by maximum junction temperature.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage (DC)
−−300
V
VGS
gate-source voltage (DC)
−±20
V
ID
drain current (DC)
Ts = 100 °C; note 1
−−325
mA
IDM
peak drain current
note 2
−−1.3
A
Ptot
total power dissipation
Ts = 100 °C
−
4W
Tstg
storage temperature
−65
+150
°C
Tj
operating junction temperature
−65
+150
°C
Source-drain diode
IS
source current (DC)
Ts = 100 °C
−−0.5
A
ISM
peak pulsed source current
note 2
−−2A
Fig.2 Power derating curve.
handbook, halfpage
0
200
10
0
2
4
6
8
MBH446
50
100
150
Ptot
(W)
Ts (
oC)
δ = 0.01; TS = 100 °C.
(1) RDSon limitation.
Fig.3 DC SOAR.
handbook, halfpage
MBH445
−1
−10
−1
−10−1
−10−2
−10−3
−102
−103
−10
VDS (V)
t p
T
P
t
t p
T
δ =
1 ms
100
µs
10 ms
DC
(1)
tp =
10
µs
ID
(A)



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