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AD8189ARUZ-R7 Scheda tecnica(PDF) 15 Page - Analog Devices |
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AD8189ARUZ-R7 Scheda tecnica(HTML) 15 Page - Analog Devices |
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15 / 24 page ![]() AD8188/AD8189 Rev. 0 | Page 15 of 24 IN0A IN0B IN1B IN1A IN2A IN2B OUT0 OUT1 OUT2 AD8188 MUX SYSTEM “C_BYPASS” VREF INTERNAL CAP BIAS REFERENCE DIRECT CONNECTION TO ANY “QUIET” AC GROUND (FOR EXAMPLE, GND, VCC, AND VEE). Figure 45. VREF Pin Connection for AD8188 (Differs from AD8189) The AD8189 The AD8189 uses on-chip feedback resistors to realize the gain- of-two function. To provide low crosstalk and a high output impedance when disabled, each set of 500 Ω feedback resistors is terminated by a dedicated reference buffer. A reference buffer is a high speed op amp configured as a unity-gain follower. The three reference buffers, one for each channel, share a single, high impedance input, the VREF pin (see Figure 46). VREF input bias current is typically less than 2 μA. OUT1 OUT0 OUT2 A0 B0 VREF 5V 5V 5V GBUF 0 5V GBUF 1 5V GBUF 2 500Ω 500Ω 500Ω 500Ω 500Ω 500Ω VF-2 VF-1 1× VFO Figure 46. Conceptual Diagram of a Single Multiplexer Channel, G = 2 This configuration has a few implications for single-supply operation: • On the AD8189, VREF cannot be tied to the most negative analog supply, VEE. The limits on reference voltage are (see Figure 47): VEE + 1.3 V < VREF × VCC − 1.6 V 1.3 V < VREF, 3.4 V on 0 V/5 V supplies A0 VREF 5V 5V OUT0 5V VO_MAX = 3.7V VO_MIN = 1.3V VO_MIN = 1.3V VO_MAX = 3.4V 5V 1.3V 1.3V 1.3V 1.6V GND GND VOUT VREF Figure 47. Output Compliance of Main Amplifier Channel and Ground Buffer • The signal at the VREF pin appears at each output. Therefore, VREF should be tied to a well bypassed, low impedance source. Using superposition, it is shown that VOUT = 2 × VIN − VREF • To maximize the output dynamic range, the reference voltage should be chosen with care. For example, consider amplifying a 700 mV video signal with a sync pulse 300 mV below black level. If the user decides to set VREF at black level to preferentially run video signals on the faster NPN transistor path, the AD8189 allows a reference voltage as low as 1.3 V + 300 mV = 1.6 V. If the AD8189 is used, the sync pulse is amplified to 600 mV. Therefore, the lower limit on VREF becomes 1.3 V + 600 mV = 1.9 V. For routing RGB video, an advantageous configuration is to employ +3 V and −2 V supplies, in which case VREF can be tied to ground. If system considerations prevent running the multiplexer on split supplies, a false ground reference should be employed. A low impedance reference can be synthesized with a second operational amplifier. Alternately, a well bypassed resistor divider can be used. Refer to the Applications section for further explanation and more examples. VREF 0.022µF 5V GND OP21 100kΩ 10kΩ 100Ω FROM 1992 ADI AMPLIFIER APPLICATIONS GUIDE 1µF 1µF Figure 48. Synthesis of a False Ground Reference |
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