HD6413003RF datasheet(21/715 Pages) RENESAS

21 / 715 page

Table 1-1 Features (cont)

Feature

Description

• Five 16-bit timer channels, capable of processing up to 12 pulse outputs or 10

pulse inputs

• 16-bit timer counter (channels 0 to 4)

• Two multiplexed output compare/input capture pins (channels 0 to 4)

• Operation can be synchronized (channels 0 to 4)

• PWM mode available (channels 0 to 4)

• Phase counting mode available (channel 2)

• Buffering available (channels 3 and 4)

• Reset-synchronized PWM mode available (channels 3 and 4)

• Complementary PWM mode available (channels 3 and 4)

• DMAC can be activated by compare match/input capture A interrupt

(channels 0 to 3)

• Maximum 16-bit pulse output, using ITU as time base

• Up to four 4-bit pulse output groups (or one 16-bit group, or two 8-bit groups)

• Non-overlap mode available

• Output data can be transferred by DMAC

Watchdog

• Reset signal can be generated by overflow

timer (WDT),

• Reset signal can be output externally

1 channel

• Usable as an interval timer

Serial

• Selection of asynchronous or synchronous mode

communication

• Full duplex: can transmit and receive simultaneously

interface (SCI),

• On-chip baud-rate generator

2 channels

A/D converter

• Resolution: 10 bits

• Eight channels, with selection of single or scan mode

• Variable analog conversion voltage range

• Sample-and-hold function

• Can be externally triggered

I/O ports

• 50 input/output pins

• 8 input-only pins

16-bit integrated

timer unit (ITU)

Programmable

timing pattern

controller (TPC)

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