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LTC2440IGN Scheda tecnica(PDF) 9 Page - Linear Technology |
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LTC2440IGN Scheda tecnica(HTML) 9 Page - Linear Technology |
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9 / 28 page ![]() LTC2440 9 sn2440, 2440fas TEST CIRCUITS FU CTIO AL BLOCK DIAGRA Figure 1. Functional Block Diagram AUTOCALIBRATION AND CONTROL DAC DECIMATING FIR INTERNAL OSCILLATOR SERIAL INTERFACE ADC ∑ ∫ ∫ ∫ GND VCC IN+ IN– SDO SCK REF+ REF – CS SDI BUSY EXT FO (INT/EXT) 2440 F01 –+ + – 1.69k SDO 2440 TA03 Hi-Z TO VOH VOL TO VOH VOH TO Hi-Z CLOAD = 20pF 1.69k SDO 2440 TA04 Hi-Z TO VOL VOH TO VOL VOL TO Hi-Z CLOAD = 20pF VCC APPLICATIO S I FOR ATIO CONVERTER OPERATION Converter Operation Cycle The LTC2440 is a high speed, delta-sigma analog-to- digital converter with an easy to use 4-wire serial interface (see Figure 1). Its operation is made up of three states. The converter operating cycle begins with the conversion, followed by the low power sleep state and ends with the data output (see Figure 2). The 4-wire interface consists of serial data input (SDI), serial data output (SDO), serial clock (SCK) and chip select (CS). The interface, timing, Figure 2. LTC2440 State Transition Diagram CONVERT SLEEP DATA OUTPUT 2440 F02 TRUE FALSE CS = LOW AND SCK |
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