MCP6212 datasheet(4/68 Pages) MICROCHIP

4 / 68 page

MCP621/1S/2/3/4/5/9

DS20002188E-page 4

 2009-2021 Microchip Technology Inc. and its subsidiaries

Output

Maximum Output Voltage Swing VOL, VOH VSS +20

—

VDD  20

VDD = 2.5V, G = +2,

0.5V Input Overdrive

VOL, VOH VSS +40

—

VDD  40

VDD = 5.5V, G = +2,

0.5V Input Overdrive

Output Short Circuit Current

ISC

±40

±85

±130

VDD = 2.5V (Note 4)

ISC

±35

±70

±110

VDD = 5.5V (Note 4)

Calibration Input

Calibration Input Voltage Range VCALRNG VSS +0.1

—

VDD –1.4

VCAL pin externally driven

Internal Calibration Voltage

VCAL

0.323VDD 0.333VDD 0.343VDD

VCAL pin open

Input Impedance

ZCAL

—100 || 5

—

||pF

Power Supply

Supply Voltage

VDD

2.5

—

5.5

Quiescent Current per Amplifier

1.2

2.5

3.6

IO = 0

POR Input Threshold, Low

VPRL

1.15

1.40

—

POR Input Threshold, High

VPRH

—1.40

1.65

TABLE 1-2:

AC ELECTRICAL SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND,

VCM = VDD/2, VOUT  VDD/2, VL = VDD/2, RL = 2 k to VL, CL = 50 pF and CAL/CS =VSS (refer to Figure 1-2).

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

AC Response

Gain Bandwidth Product

GBWP

—

MHz

Phase Margin

—

G = +1

Open-Loop Output Impedance

ROUT

—15—



AC Distortion

Total Harmonic Distortion plus

Noise

THD+N

—

0.0018

—

G = +1, VOUT = 2VP-P, f = 1 kHz,

VDD = 5.5V, BW = 80 kHz

Step Response

Rise Time, 10% to 90%

—

G = +1, VOUT = 100 mVP-P

Slew Rate

—

V/µs

G = +1

Noise

Input Noise Voltage

Eni

—20—

µVP-P f = 0.1 Hz to 10 Hz

Input Noise Voltage Density

eni

—13—

nV/

Hz f = 1 MHz

Input Noise Current Density

ini

4—

fA/

Hz f = 1 kHz

TABLE 1-1:

DC ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND,

VCM = VDD/3, VOUT  VDD/2, VL = VDD/2, RL = 2 k to VL and CAL/CS =VSS (refer to Figure 1-2).

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1: Describes the offset (under the specified conditions) right after power-up, or just after the CAL/CS pin is

toggled. Thus, 1/f noise effects (an apparent wander in VOS; see Figure 2-35) are not included.

2: Increment between adjacent VOS trim points; Figure 2-3 shows how this affects the VOS repeatability.

3: See Figure 2-6 and Figure 2-7 for temperature effects.

4: The ISC specifications are for design guidance only; they are not tested.

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