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UPD17708 Scheda tecnica(PDF) 326 Page - Renesas Technology Corp

Il numero della parte UPD17708
Spiegazioni elettronici  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17708 Scheda tecnica(HTML) 326 Page - Renesas Technology Corp

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21.6.3 Stack pointer overflow/underflow reset
A reset signal is generated if the address or interrupt stack overflows or underflows.
Stack pointer overflow/underflow reset can be used to detect a program hang-up in the same manner as watchdog
timer reset.
The reset signal is generated under the following conditions:
• Interrupt due to overflow or underflow of interrupt stack (4 levels)
• Interrupt due to overflow or underflow of address stack (15 levels)
Reset by stack pointer overflow or underflow initializes all the registers, except the stack overflow selection register,
watchdog timer counter reset register, basic timer 0 carry register, and CE reset timer carry counter.
Generation of stack pointer overflow or underflow reset is detected by the WDTCY flag (R&Reset).
21.6.4 Stack pointer setting flag
The stack overflow/underflow reset selection register can be set only once after power-ON reset on power application
or reset by the RESET pin. This register specifies whether reset by address stack overflow or underflow and reset
by interrupt stack overflow or underflow are enabled or disabled.



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