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UPD17708 Scheda tecnica(PDF) 127 Page - Renesas Technology Corp |
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UPD17708 Scheda tecnica(HTML) 127 Page - Renesas Technology Corp |
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127 / 358 page ![]() 125 µPD17704, 17705, 17707, 17708, 17709 Figure 12-10. Configuration of INT2 Pin Interrupt Request Register Name Flag symbol b3 I N T 2 b2 0 b1 0 b0 I R Q 2 Address 3CH Read/Write R/W INT2 pin interrupt request Power-ON reset WDT&SP reset CE reset Clock stop 0 1 Interrupt request not issued Interrupt request issued Indicates interrupt request issuance status of INT2 pin Fixed to “0” Low level is input High level is input Detects status of INT2 pin 0 1 0 0 R R 0 0 U U U U U: Undefined, R : Retained |
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