M25PE40 datasheet(6/60 Pages) STMICROELECTRONICS

6 / 60 page

Description

M25PE40

6/60

Description

The is a 4 Mbit (512Kb × 8 bit) Serial Paged Flash memory accessed by a high speed SPI-

compatible bus.

The memory can be written or programmed 1 to 256 bytes at a time, using the Page Write or

Page Program instruction. The Page Write instruction consists of an integrated Page Erase

cycle followed by a Page Program cycle.

The memory is organized as 8 sectors that are further divided up into 16 subsectors each

(128 subsectors in total). Each sector contains 256 pages and each subsector contains 16

pages. Each page is 256 bytes wide. Thus, the whole memory can be viewed as consisting

of 2048 pages, or 524,288 bytes.

The memory can be erased a page at a time, using the Page Erase instruction, a subsector

at a time, using the SubSector Erase instruction, a sector at a time, using the Sector Erase

instruction or as a whole, using the Bulk Erase (BE) instruction..

The memory can be Write Protected by either Hardware or Software using a mix of volatile

and non-volatile protection features, depending on the application needs. The protection

granularity is of 64 Kbytes (sector granularity).

In order to meet environmental requirements, ST offers the in ECOPACK® packages.

ECOPACK® packages are Lead-free and RoHS compliant.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Important note

This datasheet details the functionality of the devices, based on the previous T7X process

or based on the current T9HX process. Delivery of parts in T9HX process starts from July

2007.

What are the changes?

The in T9HX process offers the following additional features:

●

the whole memory array is partitioned into 4-Kbyte subsectors

●

five new instructions: Write Status Register (WRSR), Write to Lock Register (WRLR),

Read Lock Register (RDLR), 4-Kbyte SubSector Erase (SSE) and Bulk Erase (BE)

●

Status Register: 4 bits can be written (BP0, BP1, BP2, SRWD)

●

WP input (pin 3): Write protection limits are extended, depending on the value of the

BP0, BP1, BP2, SRWD bits. The WP Write protection remains the same if bits (BP2,

BP1, BP0) are set to (0, 0, 1).

●

smaller die size allowing assembly into an SO8N package

M25PE40 Scheda tecnica(PDF) 6 Page - STMicroelectronics