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M95320-R Scheda tecnica(PDF) 24 Page - STMicroelectronics

Il numero della parte M95320-R
Spiegazioni elettronici  32 Kbit and 64 Kbit Serial SPI bus EEPROMs with high speed clock
PDF  44 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95320-R Scheda tecnica(HTML) 24 Page - STMicroelectronics

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Power-up and delivery state
M95320, M95640, M95320-x, M95640-x
24/44
7
Power-up and delivery state
7.1
Power-up state
After Power-up, the device is in the following state:
●
Standby Power mode
●
deselected (after Power-up, a falling edge is required on Chip Select (S) before any
instructions can be started).
●
not in the Hold Condition
●
the Write Enable Latch (WEL) is reset to 0
●
Write In Progress (WIP) is reset to 0
The SRWD, BP1 and BP0 bits of the Status Register are unchanged from the previous
power-down (they are non-volatile bits).
7.2
Initial delivery state
The device is delivered with the memory array set at all 1s (FFh). The Status Register Write
Disable (SRWD) and Block Protect (BP1 and BP0) bits are initialized to 0.



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