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CR8F612X Scheda tecnica(PDF) 47 Page - STMicroelectronics |
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CR8F612X Scheda tecnica(HTML) 47 Page - STMicroelectronics |
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47 / 89 page ![]() CR8F612X Electrical characteristics Doc ID 15590 Rev 1 45/88 9.3.1 VCAP external capacitor Stabilization for the main regulator is achieved connecting an external capacitor CEXT to the VCAP pin. CEXT is specified in Table 17. Care should be taken to limit the series inductance to less than 15 nH. Figure 8. External capacitor CEXT 1. ESR is the equivalent series resistance and ESL is the equivalent inductance. Table 18. Operating conditions at power-up/power-down Symbol Parameter Conditions Min Typ Max Unit tVDD VDD rise time rate 2 ∞ µs/V VDD fall time rate (1) 1. Reset is always generated after a tTEMP delay. The application must ensure that VDD is still above the minimum ooperating voltage (VDD min) when the tTEMP delay has elapsed. 2 ∞ tTEMP Reset release delay VDD rising 1.7 ms VIT+ Power-on reset threshold 2.6 2.7 2.85 V VIT- Brown-out reset threshold 2.5 2.65 2.8 VHYS(BOR) Brown-out reset hysteresis 70 mV C Rleak ESR ESL |
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