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ST72F262G2B6 Scheda tecnica(PDF) 13 Page - STMicroelectronics |
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ST72F262G2B6 Scheda tecnica(HTML) 13 Page - STMicroelectronics |
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13 / 172 page ![]() ST72260Gx, ST72262Gx, ST72264Gx 13/172 Legend: x=Undefined, R/W=Read/Write Notes: 1. The contents of the I/O port DR registers are readable only in output configuration. In input configura- tion, the values of the I/O pins are returned instead of the DR register contents. 2. The bits associated with unavailable pins must always keep their reset value. 3. For compatibility with the ST72C254, the ADCDRL and ADCDRH data registers are located with the LSB on the lower address (6Fh) and the MSB on the higher address (70h). As this scheme is not little En- dian, the ADC data registers cannot be treated by C programs as an integer, but have to be treated as two char registers. |
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