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CC2550-RTR1 Scheda tecnica(PDF) 50 Page - Texas Instruments |
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CC2550-RTR1 Scheda tecnica(HTML) 50 Page - Texas Instruments |
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50 / 55 page ![]() CC2550 PRELIMINARY Data Sheet (Rev.1.2) SWRS039A Page 50 of 54 28.1 Recommended PCB layout for package (QLP 16) Figure 22: Recommended PCB layout for QLP 16 package Note: The figure is an illustration only and not to scale. There are five 10 mil diameter via holes distributed symmetrically in the ground pad under the package. See also the CC2550EM reference design. 28.2 Package thermal properties Thermal resistance Air velocity [m/s] 0 Rth,j-a [K/W] 40.1 Table 28: Thermal properties of QLP 16 package 28.3 Soldering information The recommendations for lead-free reflow in IPC/JEDEC J-STD-020C should be followed. |
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