| Motore di ricerca datesheet componenti elettronici |
|
ATS673 Scheda tecnica(PDF) 1 Page - Allegro MicroSystems |
|
|
|||||||||||||||||||||||||||||
ATS673 Scheda tecnica(HTML) 1 Page - Allegro MicroSystems |
|
1 / 19 page ![]() ATS673-DS, Rev. 1 Description Recognizing the increasingly stringent requirements for EMC/ EMIinautomotiveapplications,Allegrohastakenthenecessary steps to design devices that are capable of withstanding the effects of radiated and conducted transients. The ATS673 and ATS674 devices have been designed specifically for this purpose. Advanced circuitry on the die allows them to survive positive and negative transient pulses on both the input and output. The ATS673 and ATS674 devices retain all of the same characteristics as theATS671 andATS672. The devices remain true zero-speed gear tooth sensors with optimized Hall IC/ magnet configuration in an SIP (single in-line package). The SIP assembly consists of a molded package that holds together a samarium cobalt magnet, a pole piece, and a true zero-speed Hall IC that has been optimized to the magnetic circuit. The sensor incorporates a single element Hall IC that switches in response to magnetic signals created by a ferrous target. The IC contains a sophisticated digital circuit designed to eliminate the detrimental effects of magnet and system offsets. Signal processing is used to provide zero-speed Features and Benefits ▪ Tight timing accuracy over operating temperature range ▪ True zero-speed operation ▪ TPOS (True Power-On State) ▪ Air-gap-independent switchpoints ▪ High immunity to vibration ▪ Large operating air gaps ▪ Operation with supply voltages down to 3.3 V ▪ Digital output representing target profile ▪ Single-chip solution for high reliability ▪ Optimized Hall IC/magnet system Self-Calibrating TPOS Gear Tooth Sensor Optimized for Automotive Cam Sensing Applications Continued on the next page… Functional Block Diagram Not to scale Packages: 4 pin SIP (suffix SE) ATS673 and ATS674 Continued on the next page… GND VOUT VCC Output Driver 0.1 μF C BYPASS V+ Voltage Regulator (Analog) TEST Hall Amp Automatic Gain Control V PROC 9-Bit PDAC 9-Bit NDAC Threshold Comparator (Recommended) Voltage Regulator (Digital) Offset Adjust Temperature Coefficient Adjust Offset TC LPF TPOS TPOS Trim Power-On Reset V REF Continuous Update Logic Continuous Update Logic Comp_P Comp_N Output State Output State 9-Bit Counter Clock 9 9-Bit Counter Clock 9 Threshold Output V REG(A) V REG(D) V REG(D) V REG(A) |
Codice articolo simile - ATS673 |
|
Descrizione simile - ATS673 |
|
|
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |