WM8786

Production Data

w

PD Rev 4.2 February 2007

10

POWER-ON RESET

The WM8786 has an internal power-on reset circuit. The reset sequence is entered at power-on or

power-up (DVDD). Until the internal reset is removed, DOUT is forced to zero. DOUT remains zero

for a count equal to 32 sample clocks, after power up. (This count is driven by MCLK and is

independent of any external LRCLK).

Figure 4 POR Circuit

Figure 5 POR Timing