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AD8375 Scheda tecnica(PDF) 5 Page - Analog Devices |
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AD8375 Scheda tecnica(HTML) 5 Page - Analog Devices |
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5 / 6 page ![]() Preliminary Technical Data AD8375 Rev. PrB | Page 5 of 6 PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS Figure 2. 24 Lead LFCSP Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1 VCOM Common Mode Pin. Typically bypassed to ground using external capacitor. 2 VIN+ Voltage Input Positive. 3 VIN- Voltage Input Negative. 4 A4 The Most Significant Bit (MSB) for the 5-bit Gain Control Interface. 5 A3 MSB-1 for the Gain Control Interface. 6 A2 MSB-2 for the Gain Control Interface. 7 A1 LSB+1 for the Gain Control Interface. 8 A0 The Least Significant Bit (LSB) for the 5-bit Gain Control Interface. 9, 10,12, 13, 23 VPOS Positive Supply Pins. Should be bypassed to Ground using suitable bypass capacitor. 11, 14, 20, 21, 22, 24 COMM Device Common (DC Ground). 15, 17 VOUT+ Positive Ouptut Pins (Open Collector). Require DC bias of +5V nominal. 16, 18 VOUT- Negative Ouptut Pins (Open Collector). Require DC bias of +5V nominal. 19 PWUP Chip Enable Pin. |
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