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L033MU01VI Scheda tecnica(PDF) 32 Page - SPANSION |
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L033MU01VI Scheda tecnica(HTML) 32 Page - SPANSION |
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32 / 61 page ![]() 30 Am29LV033MU September 12, 2006 DA TA SH EET The system can monitor DQ3 to determine if the sec- tor erase timer has timed out (See the section on DQ3: Sector Erase Timer.). The time-out begins from the ris- ing edge of the final WE# pulse in the command sequence. When the Embedded Erase algorithm is complete, the device returns to reading array data and addresses are no longer latched. The system can determine the status of the erase operation by reading DQ7, DQ6, DQ2, or RY/BY# in the erasing sector. Refer to the Write Operation Status section for information on these status bits. Once the sector erase operation has begun, only the Erase Suspend command is valid. All other com- mands are ignored. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the sector erase command sequence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Figure 7 illustrates the algorithm for the erase opera- tion. Refer to the Erase and Program Operations ta- bles in the AC Characteristics section for parameters, and Figure 19 section for timing diagrams. Figure 7. Erase Operation START Write Erase Command Sequence (Notes 1, 2) Data Poll to Erasing Bank from System Data = FFh? No Yes Erasure Completed Embedded Erase algorithm in progress Notes: 1. See Table 10 for erase command sequence. 2. See the section on DQ3 for information on the sector erase timer. |
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