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M500000009 Scheda tecnica(PDF) 57 Page - Advanced Micro Devices |
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M500000009 Scheda tecnica(HTML) 57 Page - Advanced Micro Devices |
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57 / 63 page ![]() 56 Am50DL128CG November 7, 2002 P R E L I M I NARY pSRAM AC CHARACTERISTICS Notes: 1. If the device is using the I/Os to output data, input signals of reverse polarity must not be applied. 2. If OE# is high during the write cycle, the outputs will remain at high impedance. Figure 31. Pseudo SRAM Write Cycle— UB#s and LB#s Control tWC Valid Data In Addresses A20 to A0 WE# CE#1 CE2 UB#, LB# DIN DQ15 to DQ0 DOUT DQ15 to DQ0 tDS tWR tWP tCW High-Z High-Z tCH tDH tAS tBW tBE tCOE tODW |
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