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AM625SIP Scheda tecnica(PDF) 12 Page - Texas Instruments |
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AM625SIP Scheda tecnica(HTML) 12 Page - Texas Instruments |
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12 / 29 page ![]() Table 5-1. Reassigned DDRSS0 Pins on the AMK Package (continued) BALL NUMBER BALL NAME Signal Description E1 VSS Ground (Connects to the SDRAM VSS and VSSQ grounds) E2 E3 F1 F3 F4 G5 H5 H6 J1 J2 J3 J4 K1 K2 K3 K4 L1 L2 L5 L6 M1 M5 N6 P1 P4 P5 R1 R5 R6 T1 T4 U3 V1 V5 V6 W1 W5 Y1 (1) An external 240 Ω ±1% resistor must be connected between this pin and VDDS_MEM_1P1. The maximum power dissipation for the resistor is 8.33 mW. AM625SIP SPRSP98 – NOVEMBER 2023 www.ti.com 12 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AM625SIP |
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