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Isolation When VH is Connected to OP2*

Isolation When HH is Connected to OP2*

Output Third Order Intercept Point

* Isolation is recorded above insertion loss & measured at output of switch.

Path

State

F1 & F2

Pout (dBm)

Intermod

Pout (dBm)

Intermodulation

Ratio (dBc)

Output

IP3 (dBm)

VL to OP1

1

-12

-91

79

27.5

VL to OP2

1

-12

-91

79

27.5

HL to OP1

11

-12

-92

80

28

HL to OP2

11

-12

-91

79

27.5

VH to OP1

6

-12

-90

78

27

VH to OP2

6

-12

-90

78

27

HH to OP1

16

-12

-91

79

27.5

HH to OP2

16

-12

-91

79

27.5

Test Conditions

Temperature = +25° C

F1 = 2150 (MHz): -12 dBm at the Output

F2 = 2151 (MHz): -12 dBm at the Output

Vdd = +5V

VCTL Low = 0V, High = +5V

SMT CMOS 4x2 SWITCH

MATRIX, 0.2 - 3.0 GHz

Isolation When HL is Connected to OP2*

Isolation When VL is Connected to OP2*

v00.0107

-60

-50

-40

-30

-20

-10

0

0.2

0.6

1

1.4

1.8

2.2

2.6

3

HL to OP2 (state 12)

HL to OP2 (state 16)

VH to OP2 (state 8)

VH to OP2 (state 16)

VL to OP2 (state 16)

VL to OP2 (state 4)

FREQUENCY (GHz)

-60

-50

-40

-30

-20

-10

0

0.2

0.6

1

1.4

1.8

2.2

2.6

3

VH to OP2 (state 1)

VH to OP2 (state 5)

HH to OP2 (state 1)

HH to OP2 (state 13)

HL to OP2 (state 1)

HL to OP2 (state 9)

FREQUENCY (GHz)

-60

-50

-40

-30

-20

-10

0

0.2

0.6

1

1.4

1.8

2.2

2.6

3

HH to OP2 (state 14)

HL to OP2 (state 6)

VL to OP2 (state 2)

VL to OP2 (state 6)

HH to OP2 (state 6)

HL to OP2 (state 10)

FREQUENCY (GHz)

-60

-50

-40

-30

-20

-10

0

0.2

0.6

1

1.4

1.8

2.2

2.6

3

HH to OP2 (state 11)

HH to OP2 (state 15)

VH to OP2 (state 7)

VH to OP2 (state 11)

VL to OP2 (state 11)

VL to OP2 (state 3)

FREQUENCY (GHz)