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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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PCF5083H/001/F2 Scheda tecnica(PDF) 102 Page - NXP Semiconductors |
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PCF5083H/001/F2 Scheda tecnica(HTML) 102 Page - NXP Semiconductors |
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102 / 136 page  1996 Oct 29 102 Philips Semiconductors Objective specification GSM signal processing IC PCF5083 Table 78 Mode Control Registers 0 and 1 Note 1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘ −’ denotes not affected from reset line. During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other registers are undefined and have to be set by the controller. Table 79 Polarity Register (Power-Down Control Lines) Note 1. RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘ −’denotes not affected from reset line. During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other registers are undefined and have to be set by the controller. BIT R/W SYMBOL OPERATION (if bit is set) RST = 0 RSTx=0(1) 0 R/W RECRX Generate the Rx burst timing 0 − 1 R/W RECTX Generate the MON burst timing during the TX timeslot 0 − 2 R/W RECMON Generate the MON burst timing 0 − 3 R/W RECON Generate the idle frame timing 0 − 4 R/W SEND Generate the TX burst timing 0 − 5 R/W DTX Enable DTX mode 0 − 6 R/W RXLENGTH0 Select RXLENGTHx_REG for the Rx burst 0 − 7 R/W RXLENGTH1 0 − 8 R/W MONLENGTH0 Select RXLENGTHx_REG for the MON burst 0 − 9 R/W MONLENGTH1 0 − 10 R/W TXLENGTH Select TXLENGTHx_REG for the TX burst 0 − 11 R/W RXCAL Generate the RX calibration timing 0 − 12 R/W DISFRAMEINT Disable the frame interrupt 0 − 13 R/W USEMODE Select MODEx_REG for the next frame 0 − BIT R/W SYMBOL OPERATION (if bit is set) RST = 0 RSTx=0(1) 0 R/W PDRX1 Enable line has default polarity if its corresponding bit is a logic 0. Enable line has inverse default polarity if its corresponding bit is a logic 1. 0 − 1 R/W PDRX2 0 − 2 R/W NPDTX2 0 − 3 R/W PDSYN 0 − 4 R/W TXKEY1 0 − 5 R/W TXKEY2 0 − 6 R/W RXON 0 − 7 R/W TXON 0 − 8 R/W BEN 0 − 9 R/W GPON1 0 − 10 R/W GPON2 0 − 11 R/W REFON 0 − 12 R/W DSPON 0 − 13 R/W NREFON 0 − |
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