TSL2521 datasheet(24/81 Pages) OSRAM

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Datasheet, Public

Page 23

[v3-00] 2022-Dec-21

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TSL2521 − Register Overview

MEAS_MODE1 Register

Figure 21:

MEAS_MODE1

Note(s):

1. Return to the Register Map (0x82).

SAMPLE_TIME0 Register

Figure 22:

SAMPLE_TIME0

Note(s):

1. Return to the Register Map (0x83).

Addr: 0x82

MEAS_MODE1

Bit

Field

Reset

Type

Bit Description

MOD_FIFO_FD_END_

MARKER_WRITE_

ENABLE

0R/W

Enables writing of end marker to FIFO after each

complete flicker measurement.

MOD_FIFO_FD_

CHECKSUM_

WRITE_ENABLE

0R/W

Enables writing of flicker checksum to FIFO after

each complete flicker measurement.

MOD_FIFO_FD_

GAIN_WRITE_

ENABLE

0R/W

Enables writing of gain to FIFO after each complete

flicker measurement. This is required in case AGC is

enabled.

4:0

ALS_MSB_POSITION

0x0C

R/W

Internally the result can be 26 bits wide = 11-bit

samples + 11-bit sampling time + 4-bit residuals

and is stored in a 32-bit register. ALS_MSB_

POSITION defines the MSB in this 32-bit register

Addr: 0x83

SAMPLE_TIME0

Bit

Field

Reset

Type

Bit Description

7:0

SAMPLE_TIME[7:0]

0xB3

R/W

ALS measurement time step. Sets the time in steps

of 1.388889μs modulator clock. The modulator

clock can be divided with MOD_DIVIDER_SELECT

in register CFG7. Please observe that SAMPLE_

TIME needs to be set in register 0x83 and 0x84

(11-bit wide). It counts from 0-2047 (2048 counts).

SAMPLE_TIME =

(1/SamplingFreq/1.388889μs)-1

Default: 179+1 = 1/4000Hz / 1.388889μs

(180 counts as counted 0-179)

ALSIntegrationTimeStep = (SAMPLE_TIME+1) x

1.388889μs

Default: 250μs = (179+1) x 1.388889μs

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