33874 datasheet(21/37 Pages) FREESCALE

21 / 37 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

33874

FUNCTIONAL DEVICE OPERATION

LOGIC COMMANDS AND REGISTERS

SERIAL INPUT COMMUNICATION

SPI communication is accomplished using 16-bit

messages. A message is transmitted by the MCU starting

with the MSB D15 and ending with the LSB, D0 (Table 8).

Each incoming command message on the SI pin can be

interpreted using the following bit assignments: the MSB,

D15, is the watchdog bit. In some cases, output selection is

done with bits D12:D11. The next three bits, D10:D8, are

used to select the command register. The remaining five bits,

D4:D0, are used to configure and control the outputs and

their protection features.

Multiple messages can be transmitted in succession to

accommodate those applications where daisy-chaining is

desirable, or to confirm transmitted data, as long as the

messages are all multiples of 16 bits. Any attempt made to

latch in a message that is not 16 bits will be ignored.

The 33874 has defined registers, which are used to

configure the device and to control the state of the outputs.

Table 9, page 21, summarizes the SI registers.

DEVICE REGISTER ADDRESSING

The following section describes the possible register

addresses and their impact on device operation.

ADDRESS 00000—STATUS REGISTER (STATR_S)

The STATR register is used to read the device status and

the various configuration register contents without disrupting

the device operation or the register contents. The register bits

D[4:0] determine the content of the first sixteen bits of SO

data. In addition to the device status, this feature provides the

ability to read the content of the OCR0, OCR1, SOCHLR,

Table 8. SI Message Bit Assignment

Bit Sig

SI Msg Bit

Message Bit Description

MSB

D15

Watchdog in: toggled to satisfy watchdog requirements.

D14

:D15

Not used.

D12

:D11

D10

:D8

:D5

Not used.

:D1

Used to configure the inputs, outputs, and the device protection features and SO status content.

LSB

Used to configure the inputs, outputs, and the device protection features and SO status content.

Table 9. Serial Input Address and Configuration Bit Map

SI Register

SI Data

D15

D14 D13 D12 D11 D10

D8 D7

STATR_s

WDIN

SOA4

SOA3

SOA2

SOA1

SOA0

OCR0

WDIN

IN3_SPI

IN2_SPI

IN1_SPI

IN0_SPI

OCR1

WDIN

CSNS3 EN

CSNS2 EN

CSNS1 EN

CSNS0 EN

SOCHLR_s WDIN

SOCH_s

SOCL2_s

SOCL1_s

SOCL0_s

CDTOLR_s WDIN

OL_DIS_s

OCL_DIS_s

OCLT1_s

OCLT0_s

DICR_s

WDIN

FAST_SR_s

CSNS_high_s DIR_DIS_s

A/O_s

UOVR

WDIN

OT_latch-1

OT_latch_0

UV_DIS

OV_DIS

WDR

WDIN

OT_latch_3

OT_latch_2

WD1

WD0

NAR

WDIN

No Action (Allow Toggling of D15

-WDIN)

RESET

x=Don’t care.

s=Output selection with the bits A1A0 as defined in Table 10.

D15 is used to toggle watchdog event (WDIN)

33874 Scheda tecnica(PDF) 21 Page - Freescale Semiconductor, Inc

33874 Scheda tecnica(HTML) 21 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

Scheda tecnica Scarica

Link URL