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AD9957/PCBZ Scheda tecnica(PDF) 3 Page - Analog Devices |
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AD9957/PCBZ Scheda tecnica(HTML) 3 Page - Analog Devices |
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3 / 60 page ![]() AD9957 Rev. 0 | Page 3 of 60 Serial I/O Port Pin Descriptions ...............................................42 SCLK—Serial Clock................................................................42 CS—Chip Select Bar ...............................................................42 SDIO—Serial Data Input/Output .........................................42 SDO—Serial Data Out ...........................................................42 I/O_RESET—Input/Output Reset ........................................42 I/O_UPDATE—Input/Output Update ................................43 Serial I/O Timing Diagrams ......................................................43 MSB/LSB Transfers .....................................................................43 Register Map and Bit Descriptions ...............................................44 Register Map ................................................................................44 Register Bit Descriptions............................................................49 Control Function Register 1 (CFR1) ....................................50 Control Function Register 2 (CFR2) ....................................51 Control Function Register 3 (CFR3) ....................................52 Auxiliary DAC Control Register...........................................52 I/O Update Rate Register.......................................................53 RAM Segment Register 0.......................................................53 RAM Segment Register 1.......................................................53 Amplitude Scale Factor Register (ASF) ...............................53 Multichip Sync Register .........................................................54 Profile Registers...........................................................................55 Profile<0:7> Register—Single Tone......................................55 Profile<0:7> Register—QDUC .............................................55 RAM Register ..........................................................................55 GPIO Config Register ............................................................55 GPIO Data Register ................................................................56 Outline Dimensions........................................................................57 Ordering Guide ...........................................................................57 REVISION HISTORY 5/07—Revision 0: Initial Version |
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