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HCS08 Scheda tecnica(PDF) 94 Page - Motorola, Inc

Il numero della parte HCS08
Spiegazioni elettronici  Microcontrollers
PDF  290 Pages
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Produttore elettronici  MOTOROLA [Motorola, Inc]
Homepage  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

HCS08 Scheda tecnica(HTML) 94 Page - Motorola, Inc

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Internal Clock Generator (ICG) Module
MC9S08GB/GT
94
MOTOROLA
6.4 Initialization/Application Information
6.4.1 Introduction
The section is intended to give some basic direction on which configuration a user would want to select
when initializing the ICG. For some applications, the serial communication link may dictate the accuracy
of the clock reference. For other applications, lowest power consumption may be the chief clock
consideration. Still others may have lowest cost as the primary goal. The ICG allows great flexibility in
choosing which is best for any application.
The following sections contain initialization examples for various configurations.
NOTE:
Hexadecimal values designated by a preceding $, binary values designated by a
preceding %, and decimal values have no preceding character.
Important configuration information is repeated here for reference sake.
Table 6-4 ICG Configuration Consideration
Clock Reference Source = Internal
Clock Reference Source = External
FLL
Engaged
FEI
4 MHz < fBus < 20 MHz.
Medium power (will be less than FEE if oscillator
range = high)
Medium clock accuracy (After IRG is trimmed)
Lowest system cost (no external components
required)
IRG is on. DCO is on. (1)
NOTES:
1. The IRG typically consumes 100
µA. The FLL and DCO typically consumes 0.5 to 2.5 mA, depending upon output
frequency. For minimum power consumption and minimum jitter, choose N and R to be as small as possible.
FEE
4 MHz < fBus < 20 MHz
Medium power (will be less than FEI if oscillator
range = low)
Good clock accuracy
Medium/High system cost (crystal, resonator or
external clock source required)
IRG is off. DCO is on.
FLL
Bypassed
SCM
This mode is mainly provided for quick and reliable
system startup.
3 MHz < fBus < 5 MHz (default).
3 MHz < fBus < 20 MHz (via filter bits).
Medium power
Poor accuracy.
IRG is off. DCO is on and open loop.
FBE
fBus range <= 8 MHz when crystal or resonator is
used.
Lowest power
Highest clock accuracy
Medium/High system cost (Crystal, resonator or
external clock source required)
IRG is off. DCO is off.



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