PLS100 datasheet(4/8 Pages) PHILIPS

4 / 8 page

Philips Semiconductors Programmable Logic Devices

Product specification

PLS100/PLS101

Programmable logic arrays

(16

× 48 × 8)

October 22, 1993

DC ELECTRICAL CHARACTERISTICS

°C ≤ Tamb ≤ +75°C, 4.75V ≤ VCC ≤ 5.25V

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP1

MAX

UNIT

Input voltage2

VIH

High

VCC = MAX

2.0

VIL

Low

VCC = MIN

0.8

VIC

Clamp3

VCC = MIN, IIN = –12mA

–0.8

–1.2

Output voltage2

VCC = MIN

VOH

High (PLS100)4

IOH = –2mA

2.4

VOL

Low5

IOL = 9.6mA

0.35

0.45

Input current

IIH

High

VIN = 5.5V

< 1

µA

IIL

Low

VIN = 0.45V

–10

–100

µA

Output current

IO(OFF)

Hi-Z state (PLS100)

CE = High, VCC = MAX

VOUT = 5.5V

µA

VOUT = 0.45V

–1

–40

µA

IOS

Short circuit (PLS100) 3, 6

CE = Low, VOUT = 0V

–15

–70

ICC

VCC supply current7

VCC = MAX

120

170

Capacitance

CE = High, VCC = 5.0V

CIN

Input

VIN = 2.0V

COUT

Output

VOUT = 2.0V

NOTES:

1. All typical values are at VCC = 5V, Tamb = +25°C.

2. All voltage values are with respect to network ground terminal.

3. Test one pin at a time.

4. Measured with VIL applied to CE and a logic high stored.

5. Measured with a programmed logic condition for which the output test is at a low logic level. Output sink current is applied through a resistor

to VCC.

6. Duration of short circuit should not exceed 1 second.

7. ICC is measured with the Chip Enable input grounded, all other inputs at 4.5V and the outputs open.

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