| Motore di ricerca datesheet componenti elettronici |
|
ADC3910CSSS Scheda tecnica(PDF) 12 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
ADC3910CSSS Scheda tecnica(HTML) 12 Page - Texas Instruments |
|
12 / 131 page ![]() 5.10 Timing Requirements Maximum and minimum values are specified over the operating free-air temperature range and nominal supply voltages. Typical values are specified at TA = 25°C, ADC sampling rate = 125 MSPS, 50% clock duty cycle, AVDD = IOVDD = 1.8 V, Internal 1.2 V reference, 5 pF output load, and –1-dBFS differential input, unless otherwise noted PARAMETER TEST CONDITIONS MIN NOM MAX UNIT ADC TIMING SPECIFICATIONS tAD Aperture Delay 0.5 ns tA Aperture Jitter square wave clock with fast edges 500 fs tACQ Signal acquisition period, referenced to sampling clock falling edge -TS/5 Sampling Clock Period tCONV Signal conversion period, referenced to sampling clock falling edge Fs = 25 MSPS 5.5 ns Fs = 65 MSPS 5.5 ns Fs = 125 MSPS 5.5 ns Wake up time Time to valid data after coming out of power down. Internal reference. 30 us Time to valid data after coming out of power down. External 1.2V reference. 19 us ADC Latency Signal input to data output Low Latency Mode(1) 1 ADC clock cycles Digital features enabled (includes Serial CMOS interface modes) 5 Add. Latency Real Decimation 2 25 4 60 8 130 16 270 INTERFACE TIMING - DDR CMOS tPD Propagation delay: sampling clock falling edge to DCLK rising edge TS/4 + 3 ns tDE DCLK edge to previous data transition Fs = 25 MSPS -10 -9 Fs = 65 MSPS -3.8 -3.4 Fs = 125 MSPS -2 -1.8 tDL DCLK edge to next data transition Fs = 25 MSPS 9 10 Fs = 65 MSPS 3.4 3.8 Fs = 125 MSPS 1.8 2 INTERFACE TIMING - SDR CMOS tPD Propagation delay: sampling clock falling edge to DCLK rising edge TS/4 + 3 ns tDE DCLK edge to previous data transition Fs = 25 MSPS -20 -18 Fs = 65 MSPS -7.6 -6.9 Fs = 125 MSPS -4 -3.6 tDV DCLK edge to next data transition Fs = 25 MSPS 18 20 Fs = 65 MSPS 6.9 7.7 Fs = 125 MSPS 3.6 4 ADC3910D025, ADC3910D065, ADC3910D125 ADC3910S025, ADC3910S065, ADC3910S125 SBASAD1A – DECEMBER 2023 – REVISED MAY 2024 www.ti.com 12 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: ADC3910D025 ADC3910D065 ADC3910D125 ADC3910S025 ADC3910S065 ADC3910S125 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |