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SN74LVC126ADGVR Scheda tecnica(PDF) 10 Page - Texas Instruments |
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SN74LVC126ADGVR Scheda tecnica(HTML) 10 Page - Texas Instruments |
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10 / 33 page ![]() 7 Detailed Description 7.1 Overview The SN74LVC126A quadruple buffer is designed for 1.65-V to 3.6-V VCC operation and features tri-state outputs. The SN74LVC126A devices perform the Boolean function Y = A in positive logic. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as down- translators in a mixed 3.3-V or 5-V system environment. 7.2 Functional Block Diagram 1 1OE 2 1A 1Y 3 4 2OE 5 2A 2Y 6 10 3OE 9 3A 3Y 8 13 4OE 12 4A 4Y 11 Copyright © 2016, Texas Instruments Incorporated 7.3 Feature Description The SN74LVC126A device features four independent buffers with 3-state outputs, and is designed to operate from a VCC of 1.65 V to 3.6 V. When the output enable (OE) input is low, the corresponding output is disabled and enters a high-impedance state. This device also features high-tolerance inputs, allowing for voltage translation in mixed voltage systems. Wide operating temperature range enables this device to be used in any application, including rugged or extreme environments. 7.4 Device Functional Modes The SN74LVC126A's 3-state outputs allow the outputs to be disabled using the output enable (OE) pin. To ensure the high-impedance state during power up and power down, OE must be tied to GND through a pulldown resistor. The minimum value of the resistor is determined by the current-sourcing capability of the driver. Table 7-1. Function Table (Each Buffer) INPUTS OUTPUT OE A Y H H H H L L L X Hi-Z SN74LVC126A SCAS339T – MARCH 1994 – REVISED MAY 2024 www.ti.com 10 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: SN74LVC126A |
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