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33888 Scheda tecnica(PDF) 21 Page - Freescale Semiconductor, Inc |
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33888 Scheda tecnica(HTML) 21 Page - Freescale Semiconductor, Inc |
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21 / 40 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 21 33888 FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES The FS pin is driven to a logic [0] when a fault exists on any of the outputs. FS provides real time monitoring of the overvoltage fault. For the high-side outputs, FS provides real time monitoring of the open load and overtemperature. For the low-side outputs, the FS is latched to a logic [0] for open load, overtemperature, and overcurrent faults. The latch is cleared by toggling the state of the faulted output or by bringing RST low. OVERTEMPERATURE FAULT The 33888 incorporates overtemperature detection and shutdown circuitry into each individual output structure. Overtemperature detection occurs when an output is in the ON state. When an output is shut down due to an overtemperature condition, no other output is affected. The output experiencing the fault is shut down to protect itself from damage. A fault bit is loaded into the status register if the overtemperature condition is removed, and the fault bit is cleared upon the rising edge of CS. For the low-side outputs, the faulted output is latched OFF during an overtemperature condition. If the temperature falls below the recovery level, TLIM(HYS), then the output can be turned back ON only after the output has first been commanded OFF either through the SPI or the ILS, depending on the logic configuration. For the high-side output(s), an overtemperature condition will result in the output(s) turning OFF until the temperature falls below the TLIM(HYS). This cycle will continue indefinitely until action is taken by the MCU to shut the output(s) OFF. OVERVOLTAGE FAULT The 33888 shuts down all outputs during an overvoltage condition on the VPWR pin. The outputs remain in the OFF state until the overvoltage condition is removed. Fault status for all outputs is latched into the status register. Following an overvoltage condition, the next write cycle sent by the SO pin of the 33888 is logic [1] on OD11:OD0, indicating all outputs have shut down. If the overvoltage condition is removed, the status register can be cleared by a rising edge on CS. OPEN LOAD FAULT The 33888 incorporates open load detection circuitry on every output. A high-side or low-side output open load fault is detected and reported as a fault condition when the corresponding output is disabled (OFF) if it was configured for open load detection by setting the appropriate bit to logic [0] (HS3:HS0) or logic [1] (LS11:LS4) in the OLFCR register (see Figure 7). The high-side open load fault is detected and latched into the status register after the internal gate voltage is pulled low enough to turn off the output. If the open load fault is removed or if the faulted output is commanded ON, the status register can be cleared by a rising edge on CS. Note that the device default state will enable the high-side open load detection and disable the low-side open load detection circuits, respectively. It is recommended to disable the open load detection circuitry (OL bit sets to logic [1]) in case of a permanent open load fault condition. Figure 7. Low-Side Output OFF Open Load Detection OVERCURRENT FAULT REQUIREMENTS: LOW- SIDE OUTPUT An overcurrent condition is defined as any current value greater than ILIM (500 mA minimum value for LS5, LS7, LS9, LS11, and 800 mA minimum value for LS4, LS6, LS8, LS10). The status of the corresponding bit in the CLOCCR register determines whether a specific output shuts down or continues to operate in an analog current limited mode until either the overcurrent condition is removed or the thermal shutdown limit is reached (Figure 10, page 27). If the overcurrent shutdown mode is disabled, the fault reporting is disabled as well. For the low-side output of interest, if a D11:D4 bit was set to a logic [1] in the OLCR register, the overcurrent protection shutdown circuitry will be enabled for that output. When a low-side output is commanded ON either from the SPI or the ILS pin, the drain of the low-side driver will be monitored for a voltage greater than the fault detection threshold (3.0 V typical). If the drain voltage exceeds this threshold, a timer will start and the output will be turned off and a fault latched in the status register after the timeout expires. The faulted output can be retried only by commanding the output OFF and back ON either through the SPI or the ILS pin, depending on the logic configuration. If the fault is gone, the retried output will return to normal operation and the status register can be cleared on a rising edge of CS. If the fault remains, the VTHRES MOSFET LOW = Logic 0 50 mA VOFD(THRES)LS 2.0 V–4.0 V – + 33888 VPWR RL OUT |
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