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MPC855T Scheda tecnica(PDF) 71 Page - Freescale Semiconductor, Inc |
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MPC855T Scheda tecnica(HTML) 71 Page - Freescale Semiconductor, Inc |
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71 / 80 page ![]() MPC860 Family Hardware Specifications, Rev. 7 Freescale Semiconductor 71 Mechanical Data and Ordering Information Figure 74 shows the MII serial management channel timing diagram. Figure 74. MII Serial Management Channel Timing Diagram 14 Mechanical Data and Ordering Information Table 33 provides information on the MPC860 Revision D.4 derivative devices. M13 MII_MDIO (input) to MII_MDC rising edge hold 0 — ns M14 MII_MDC pulse width high 40% 60% MII_MDC period M15 MII_MDC pulse width low 40% 60% MII_MDC period Table 33. MPC860 Family Revision D.4 Derivatives Device Number of SCCs 1 Ethernet Support 2 (Mbps) Multichannel HDLC Support ATM Support MPC855T 1 10/100 Yes Yes MPC860DE 2 10 N/A N/A MPC860DT 10/100 Yes Yes MPC860DP 10/100 Yes Yes Table 32. MII Serial Management Channel Timing Num Characteristic Min Max Unit M11 MII_MDC (Output) MII_MDIO (Output) M12 M13 MII_MDIO (Input) M10 M14 MM15 |
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