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XRT79L71IB Scheda tecnica(PDF) 96 Page - Exar Corporation |
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XRT79L71IB Scheda tecnica(HTML) 96 Page - Exar Corporation |
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96 / 109 page ![]() XRT79L71 93 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE REV. 1.0.0 t14 TxNib set-up time to third rising edge of TxInClk 20 27 ns ns DS3 Applications E3 Applications t15 Payload Nibble hold time, from latching edge of TxInClk 0 ns t16 TxFrameRef set-up time, to latching edge of TxInClk 20 27 ns ns DS3 Applications E3 Applications Framer IC is Frame Slave t17 TxFrameRef hold time, from latching edge of TxNib- Clk 0 ns Framer IC is Frame Slave t18 TxNibClk to TxNibFrame output delay time 20 25 31 ns ns DS3 Applications E3 Applications FIGURE 17. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD DATA INPUT INTERFACE WHEN THE XRT79L71 IS OPERATING IN BOTH THE DS3 AND LOOP-TIMING MODES TABLE 16: TIMING INFORMATION FO RTHE TRNASMIT PAYLOAD DATA INPUT INTERFACE BLOCK Test Conditions: TA = 25°C, VDD = 3.3V + 5% unless otherwise specified SYMBOL PARAMETER MIN.TYP.MAX.UNITS CONDITIONS XRT79L71 Transmit Payload Data I/F Signals RxOutClk TxSer TxFrame TxOH_Ind Payload[4702] Payload[4703] X-Bit Payload[0] DS3 Frame Number N DS3 Frame Number N + 1 t1 t2 t3 t4 |
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