XRT83SL216IB datasheet(18/42 Pages) EXAR

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XRT83SL216

16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT

REV. 1.0.0

NOTE: VDD=3.3V ±5%, TA=25°C, Unless Otherwise Specified

1.3

Receive Sensitivity

To meet short haul requirements, the XRT83SL216 can accept E1 signals that have been attenuated by 11dB

of flat loss in E1 mode. The test configuration for measuring the receive sensitivity is shown in Figure 6.

FIGURE 6. TEST CONFIGURATION FOR MEASURING RECEIVE SENSITIVITY

1.4

General Alarm Detection and Interrupt Generation

The receive path detects RLOS and AIS. These alarms can be individually masked to prevent the alarm from

triggering an interrupt. To enable interrupt generation, the Global Interrupt Enable (GIE) bit must be set "High"

in the appropriate global register. Any time a change in status occurs (if the alarms are enabled), the interrupt

pin will pull "Low" to indicate an alarm has occurred. Once the status registers have been read, the INT pin will

return "High". The status registers are Reset Upon Read (RUR).

NOTE: The interrupt pin is an Open-Drain output that requires a 10k

Ω pull-up resistor.

TABLE 1: TIMING SPECIFICATIONS FOR RCLK/RPOS/RNEG

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

RCLK Duty Cycle

RCDU

Receive Data Setup Time

RSU

150

Receive Data Hold Time

RHO

150

RCLK to Data Delay

RDY

RCLK Rise Time (10% to 90%)

with 25pF Loading

RCLKR

RCLK Fall Time (90% to 10%)

with 25pF Loading

RCLKF

Ne twork

Analyze r

E1 = PRBS 215 - 1

Exte rnalLoopback

XRT83SL216

16-Channe l

Short Haul LIU

FlatLoss

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