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IRLL014 Scheda tecnica(PDF) 5 Page - EVER SEMICONDUCTOR CO.,LIMITED |
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IRLL014 Scheda tecnica(HTML) 5 Page - EVER SEMICONDUCTOR CO.,LIMITED |
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5 / 8 page ![]() QG QGS QGD VG Charge + - VDS 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % RD VGS VDD RG D.U.T. D.U.T. VDS ID IG 3mA VGS .3 µF 50K Ω .2 µF 12V Current Regulator Same Type as D.U.T. Current Sampling Resistors + - VDS 90% 10% VGS td(on) tr td(off) tf Fig 10b. Switching Time Waveforms Fig 10a. Switching Time Test Circuit Fig 9a. Basic Gate Charge Waveform Fig 9b. Gate Charge Test Circuit Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 10V 0.1 1 10 100 1000 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 t , Rectangular Pulse Duration (sec) 1 D = 0.50 0.01 0.02 0.05 0.10 0.20 SINGLE PULSE (THERMAL RESPONSE) A P t2 1 t DM Notes: 1. Duty factor D = t / t 2. Peak T = P x Z + T 12 J DM thJA A 55V N-Channel MOSFET IRLL014 Page 5 of 8 Rev:2023A2 |
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