PI627MC-A4 / PI628MC-A4 / PI629MC-A4 Engineering Data Sheet

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Timing Characteristics at 25°C

The Timing Characteristics at 25°C for the I/O clocks are shown in Figure 5 and their definitions detailed in

Table 12. Only one video output is shown because all four video sections have identical electrical

characteristics. Since there is 7 die in sections 1, 2 and 3 and 6 die in section 4, the output waveform for

section 4 (Vout 4) is shorter by 192 pixels.

Figure 5. Module Timing Diagram

Item

Symbol

Min

Typical

Max

Units

Clock cycle time

to

0.182

1.93

µs

Clock pulse width

tw

46

1448

ns

Clock duty cycle

25

75

%

Prohibit crossing time of the

Start Pulse

(1)

tprh

50

ns

Data setup time

tds

50

ns

Data hold time

tdh

50

ns

Signal delay time

tdl

50

ns

Signal settling time

tsh

100

ns

Table 12. Timing Definitions

Note

1. "Prohibit crossing of the start pulse", tprh, is to indicate that the start pulse should not be active high

between two consecutive low going clock pulses. All falling clock edges under an active high start pulse

loads the internal shift register, therefore the start pulse must be active over only one falling clock edge.

A high start pulse crossing over any rising clock edges are ignored by the shift register. One simple way

to ensure that the start pulse will not be actively high for any two consecutive falling clock edges is to

generate the start pulse on a rising clock edge and terminate it on the following rising clock edge.

Page 12 of 13, Revised 2-23-04